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Sequence Next-Generation Tools for Low-Power Design Highlight India's VLSI Design 2005 Conference Jan. 3-5; Ties to Conference Theme of "Power-Aware Design of VLSI Systems"

SANTA CLARA, Calif.—(BUSINESS WIRE)—Dec. 22, 2004— Sequence Design, the EDA accuracy and performance leader in power integrity, is using the upcoming VLSI Design 2005 Conference in Kolkata, India to once again demonstrate its technology leadership in low-power design tools and techniques for the emerging chip design applications in portable computing, handheld games, and wireless systems.

Sequence VP of product marketing, Piyush Sancheti, delivers a talk on "Next Generation Solutions for Low-Power Design" on Monday, Jan. 3 at 3:35 p.m., Session 2E, Taj Bengal. His remarks will describe how Sequence Design is uniquely positioned to lead the next-generation design flow for low-power design. Specifics include a description of the challenges confronting SoC designers at 130nm and below, and insights into new "power-aware" flows capable of reducing power and design cycles up to 30 percent.

In its booth -- No. 39 -- Sequence will feature its complete lineup of tools for the analysis and optimization of power, dynamic voltage-drop, electromigration, and signal integrity. Those interested in scheduling demos at the show may contact Sequence India directly by e-mail: cpuri@sequencedesign.com, or phone +91-9810313320.

Sequence has invested over Rs. 20 Crores in India-based R&D operations for over 5 years, initially in a strategic relationship with Interra Systems, and then in its own operations since August 2003 at Noida. Currently, Sequence enjoys a growing customer base of multinational semiconductor companies in India, especially in Bangalore's technology-rich environment, according to company president and CEO Vic Kulkarni, a 1974 IIT Bombay graduate. Kulkarni said he expects to double Sequence India's strength in 2005, and announced the company will open a new "Center of Excellence" in Noida's new Logix Techno Park, focused on engineering, marketing, and support for Sequence's growing customer base in Japan and southeast Asia. In addition, the company is planning to implement a new educational and advanced research program with leading Indian universities in 2005.

The International Conference on VLSI Design is a leading international conference on VLSI design, drawing 700 attendees from India and abroad. The conference is dedicated to all aspects of integrated circuit design, technology, and computer-aided design. For more information: http://vlsi.nj.nec.com.

About Sequence

Sequence Design, Inc. enables nanometer system-on-chip (SoC) designers to bring higher-performance and power-aware integrated circuits quickly to fabrication. Sequence's power and signal integrity software give its more than 150 customers the competitive advantage necessary to excel in aggressive technology markets, despite demanding complexity and time-to-market issues of nanometer design.

Sequence has worldwide development and field service operations. The company was recently named by Reed Electronics as one of the top 10 companies to watch in the electronics industry. Sequence is privately held. The company is a member of Cadence Design Systems' Connections(TM) and Mentor Graphics' Open Door(TM) partnership programs. Additional information is available at sequencedesign.com.

All trademarks mentioned herein are the property of their respective owners.



Contact:
Sequence Public Relations
Jim Lochmiller, 541-821-3438 (U.S.)
lochpr@yahoo.com
or
Sequence India
Charu Puri, +91-9810313320
cpuri@sequencedesign.com

http://www.mentor.com/dsm
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